What (who) is Fast Page Mode Dynamic Random Access Memory - definition
![[[MoSys]] MDRAM MD908](https://commons.wikimedia.org/wiki/Special:FilePath/MoSys MD908.png?width=200 "[[MoSys]] MDRAM MD908")
![1 Mbit high speed [[CMOS]] pseudo static RAM, made by [[Toshiba]]](https://commons.wikimedia.org/wiki/Special:FilePath/Olivetti JP90 - Toshiba TC518129CFWL-80 on controller-8514.jpg?width=200 "1 Mbit high speed [[CMOS]] pseudo static RAM, made by [[Toshiba]]")
![NMOS]] DRAM cell. It was patented in 1968.](https://commons.wikimedia.org/wiki/Special:FilePath/Original 1T1C DRAM design.svg?width=200 "NMOS]] DRAM cell. It was patented in 1968.")
![die]] of a Samsung DDR-SDRAM 64MBit package](https://commons.wikimedia.org/wiki/Special:FilePath/SAMSUNG@DDR-SDRAM@64MBit@K4D62323HA-QC60 Stack-DSC03539-DSC03556 - ZS-DMap.jpg?width=200 "die]] of a Samsung DDR-SDRAM 64MBit package")
![A 512 MBit [[Qimonda]] GDDR3 SDRAM package](https://commons.wikimedia.org/wiki/Special:FilePath/Sapphire Ultimate HD 4670 512MB - Qimonda HYB18H512321BF-10-93577.jpg?width=200 "A 512 MBit [[Qimonda]] GDDR3 SDRAM package")
Wikipedia
Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivalent standalone DRAM chips used as external memory, but the performance advantages of placing eDRAM onto the same chip as the processor outweigh the cost disadvantages in many applications. In performance and size, eDRAM is positioned between level 3 cache and conventional DRAM on the memory bus, and effectively functions as a level 4 cache, though architectural descriptions may not explicitly refer to it in those terms.
Embedding memory on the ASIC or processor allows for much wider buses and higher operation speeds, and due to much higher density of DRAM in comparison to SRAM, larger amounts of memory can be installed on smaller chips if eDRAM is used instead of eSRAM. eDRAM requires additional fab process steps compared with embedded SRAM, which raises cost, but the 3× area savings of eDRAM memory offsets the process cost when a significant amount of memory is used in the design.
eDRAM memories, like all DRAM memories, require periodic refreshing of the memory cells, which adds complexity. However, if the memory refresh controller is embedded along with the eDRAM memory, the remainder of the ASIC can treat the memory like a simple SRAM type such as in 1T-SRAM.
eDRAM is used in various products, including IBM's POWER7 processor, and IBM's z15 mainframe processor (mainframes built which use up to 4.69 GB of eDRAM when 5 such add-on chips/drawers are used but all other levels from L1 up also use eDRAM, for a total of 6.4 GB of eDRAM). Intel's Haswell CPUs with GT3e integrated graphics, many game consoles and other devices, such as Sony's PlayStation 2, Sony's PlayStation Portable, Nintendo's GameCube, Nintendo's Wii, Nintendo's Wii U, Apple Inc.'s iPhone, Microsoft's Zune HD, and Microsoft's Xbox 360 also use eDRAM.
